发明名称 Analog to digital converter calibration via synchronous demodulation
摘要 A technique for dynamically calibrating a successive approximation charge to digital converter by toggling at least some portion of the converter between two predetermined states, with the design goal of balancing the voltage and/or charge that is output in the two states. The two states are chosen such that they are expected to generate the same output voltage when the converter is in normal operation mode. If there is an imbalance, switching between the two calibration states invariably generates a square wave signal that toggles between two distinct values. A synchronous demodulator having a bandwidth centered at the toggle frequency can then be used to accurately detect an amount of error, which is then feedback to generate correction signals. The detected value of the error signal can in turn can be further integrated over time, to provide a correction value. If there are undesirable static offsets introduced by the synchronous demodulator or by the signal and/or charge levels output by the two differential halves of the converter, a properly timed latch can be used to further stabilize the error signal.
申请公布号 US7106230(B2) 申请公布日期 2006.09.12
申请号 US20040870330 申请日期 2004.06.17
申请人 KENET, INC. 发明人 KUSHNER LAWRENCE J.;ANTHONY MICHAEL P.
分类号 H03M1/10 主分类号 H03M1/10
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