发明名称 Parallel data scrambler
摘要 A data scrambler is capable of scrambling N bits of data in parallel using a 2<SUP>B</SUP>-1 bit scrambling sequence. The scrambler may store scrambling values of an m-sequence in a table. The table may be formed into at least two overlapping swaths of N columns, wherein each swath may store the m-sequence and the m-sequence of one swath is shifted from the m-sequence of a second swath. The scrambler may read a current swath N bits at a time and then may scramble N bits of input data in parallel using the N bits of the swath. When the swath is finished, the scrambler may shift to another swath.
申请公布号 US7106859(B2) 申请公布日期 2006.09.12
申请号 US20010977250 申请日期 2001.10.16
申请人 INTEL CORPORATION 发明人 MYSZNE JORGE
分类号 G06F17/00;H04L25/03 主分类号 G06F17/00
代理机构 代理人
主权项
地址