| 摘要 |
To provide a dynamic semiconductor memory device wherein it is possible to perform a reliable redundancy relief with a small layout area and high redundancy relieving rate while properly dealing with the standby current fault caused by a short-circuit defect between a bit line and word line. A common current-limiting element is provided for an equalizer circuit for a bit line pair on one side and another equalizer circuit for another bit line pair on the other side in a shared sense amplifier, and a bit line precharge potential is supplied to the equalizer circuits on the both sides through the current-limiting element.
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