发明名称 Method and system for universal packaging in conjunction with a back-end integrated circuit manufacturing process
摘要 A method and system for universal packaging in conjunction with an automated in-line back-end IC manufacturing process. In one method embodiment, the present invention processes a die-strip through a number of integrated in-line processes that function independently of the die size of the die-strip. A control computer maintains a die-strip map database recording the die size of the die-strip. In-line molding and solder ball attachment processes are then performed and function independently of the die size of the die-strip. Processes that are independent of die size provide a universal packaging manufacturing solution. The present invention then accesses the database to determine the die size for cutting the die-strip based on specifications maintained by the electronic die-strip map database. Sorting, testing and finish assembly processes are then performed.
申请公布号 US7105377(B1) 申请公布日期 2006.09.12
申请号 US20040824006 申请日期 2004.04.13
申请人 CYPRESS SEMICONDUCTOR CORPORATION 发明人 CHANG BO SOON;VERMA VANI
分类号 H01L21/677 主分类号 H01L21/677
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