发明名称 Method of manufacturing semiconductor device having impurity region under isolation region
摘要 In formation of a source/drain region of an NMOS transistor, a gate-directional extension region < 41a> of an N<SUP>+</SUP> block region < 41> in an N<SUP>+</SUP> block resist film < 51 < prevents a well region < 11> located under the gate-directional extension region < 41a> from implantation of an N-type impurity. A high resistance forming region, which is the well region < 11> having a possibility for implantation of an N-type impurity on a longitudinal extension of a gate electrode < 9> , can be formed as a high resistance forming region <A 2> narrower than a conventional high resistance forming region <A 1 >. Thus, a semiconductor device having a partially isolated body fixed SOI structure capable of reducing body resistance and a method of manufacturing the same are obtained.
申请公布号 US7105389(B2) 申请公布日期 2006.09.12
申请号 US20030748273 申请日期 2003.12.31
申请人 发明人
分类号 H01L21/00;H01L27/08;H01L21/762;H01L21/8238;H01L21/84;H01L27/092;H01L27/12;H01L29/78;H01L29/786 主分类号 H01L21/00
代理机构 代理人
主权项
地址