发明名称 DOUBLE DATA RATE SCHEME FOR DATA OUTPUT
摘要 Systems, devices, and methods for a double data rate memory device includes a storage element, a first pipeline, and a second pipeline. The pipelines are connected to the storage unit to pass or output data on rising and falling edges of an external clock signal. The device permits data transferring at dual data rates. Another memory device includes a storage element and a plurality of pipelines for transferring data. The plurality of pipelines each pass data on different events.
申请公布号 US2006198234(A1) 申请公布日期 2006.09.07
申请号 US20060380617 申请日期 2006.04.27
申请人 发明人 THOMANN MARK R.;LI WEN
分类号 G11C8/00 主分类号 G11C8/00
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