| 摘要 |
PROBLEM TO BE SOLVED: To provide a gradation voltage generation circuit which facilitates a design of an output stage in a CMOS amplifier design when a buffer amplifier is built in an LCD driver, or the like. SOLUTION: The gradation voltage generation circuit includes a first resistive ladder circuit which is connected between a high voltage power source terminal (VDD) and a low voltage power source terminal (GND) and generates reference voltages (Vn, Vn-1, ..., V1) at the respective nodes, a second resistive ladder circuit which is connected between the high voltage power source terminal (VDD) and the low voltage power source terminal (GND), and a plurality of voltage follower circuits (OPn, OPn-1, ..., OP1) which are connected between each node of the second resistive ladder circuit and each node of the first resistive ladder circuit, including a first resistor (Ra) between a node voltage Vn/2 and the high voltage power source terminal (VDD), including a second resistor (Rb) between a node voltage Vn/2 + 1 and the low voltage power source terminal (GND). COPYRIGHT: (C)2006,JPO&NCIPI
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