| 发明名称 |
Efficient muxing scheme to allow for bypass and array access |
| 摘要 |
A method and apparatus for using a 2:1 MUX to control read access, data bypass, and page size bypass in a memory array. The mechanism of the present invention reduces the 3:1 MUX normally required to manage these three functions to a 2:1 MUX.
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| 申请公布号 |
US2006198297(A1) |
申请公布日期 |
2006.09.07 |
| 申请号 |
US20050054287 |
申请日期 |
2005.02.09 |
| 申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BIANCHI ANDREW J.;FLUHR ERIC J.;KHAN MASOOD A.;HYEOK LEE MICHAEL J.;SEEWANN EDELMAR |
| 分类号 |
H04L12/26 |
主分类号 |
H04L12/26 |
| 代理机构 |
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