发明名称 Apparatus and method for split transistor memory having improved endurance
摘要 The present invention includes floating gate transistor structures used in non-volatile memory devices such as flash memory devices. In one embodiment, a system includes a CPU and a memory device including an array having memory cells having columnar structures and a floating gate structure interposed between the structures that is positioned closer to one of the structures. In another embodiment, a memory device includes an array having memory cells having adjacent FETs having source/drain regions and a common floating gate structure that is spaced apart from the source/drain region of one FET by a first distance, and spaced apart from the source/drain region of the opposing FET by a second distance. In still another embodiment, a memory device is formed by positioning columnar structures on a substrate, and interposing a floating gate between the structures that is closer to one of the structures.
申请公布号 US2006197143(A1) 申请公布日期 2006.09.07
申请号 US20060416584 申请日期 2006.05.03
申请人 MICRON TECHNOLOGY, INC. 发明人 FORBES LEONARD
分类号 H01L29/788;H01L21/8238;H01L21/8246;H01L21/8247;H01L27/115 主分类号 H01L29/788
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