发明名称 CMOS image sensor with a low-power architecture
摘要 A system of reducing power consumption in and active pixels sensor. The sensor is broken into different blocks, and each of the blocks is individually optimized. The optimization may include minimizing the parasitic capacitance on the readout bus, turning off biases when not in use, and operating in a way that minimizes static power consumption of different elements such as A/D converters.
申请公布号 US2006197857(A1) 申请公布日期 2006.09.07
申请号 US20060418268 申请日期 2006.05.05
申请人 发明人 BARNA SANDOR L.;ROSSI GUISEPPE;CHO KWANG-BO;PANICACCI ROGER
分类号 H04N3/15;H04N5/351;H04N5/374;H04N5/378 主分类号 H04N3/15
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