发明名称 Nonvolatile semiconductor memory having a plurality of interconnect layers
摘要 A nonvolatile semiconductor memory includes a memory cell array including horizontally aligned memory cell columns, each including vertically arranged memory cell transistors and select transistors selecting the memory cell transistors; first cell well lines connecting well regions in which the memory cell columns are formed; second cell well lines arranged in an interconnect layer above the first cell well lines and connecting the first cell well lines to one another electrically; and a cell source line connecting source terminals of the select transistors in each memory cell column.
申请公布号 US2006198196(A1) 申请公布日期 2006.09.07
申请号 US20060345505 申请日期 2006.02.02
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 ABE TAKUMI;FUKUDA KOICHI;MAEJIMA HIROSHI
分类号 G11C11/34;G11C16/04 主分类号 G11C11/34
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