发明名称 SELF-BYPASSING VOLTAGE LEVEL TRANSLATOR CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a voltage level translator circuit for interfacing between multiple voltage levels that does not suffer from problems exhibited by conventional voltage level translator circuits. SOLUTION: The voltage level translator circuit is selectively operable in one of at least two modes in response to a control signal. In a first mode, the voltage level translator circuit is operative to translate an input signal referenced to a first power supply providing a first voltage to an output signal referenced to a second power supply providing a second voltage. In a second mode, the voltage level translator circuit is operative to provide a signal path from an input of the voltage translator circuit to an output thereof without translating the input signal. The control signal is indicative of a difference between the first voltage and the second voltage. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006238449(A) 申请公布日期 2006.09.07
申请号 JP20060047620 申请日期 2006.02.24
申请人 AGERE SYSTEMS INC 发明人 BHATTACHARYA DIPANKAR;MAKESHUWAA KOZANDARAMAN;KRIZ JOHN C;MORRIS BERNARD L;SMOOHA YEHUDA
分类号 H03K19/0185 主分类号 H03K19/0185
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