| 摘要 |
<P>PROBLEM TO BE SOLVED: To save power consumption by reducing useless power consumption in a wireless communication apparatus which performs wireless communication using an output of a PLL circuit while that PLL circuit is locked. <P>SOLUTION: Under control by a CPU, RF<SB>ON</SB>intermittently becomes "H" and RX<SB>V</SB>becomes "L" synchronously with RF<SB>ON</SB>. When RF<SB>ON</SB>becomes "H", an output voltage of a regulator 10 is supplied to a PLL constituted of a VCO 5, TCXO 6 and PLL synthesizer 7. When the PLL is locked and a lock detect signal of an "H" level is output from the PLL synthesizer 7 and input to an inverter 12, an output of an inverter 14 becomes the "H" level and supplied to a reception circuit 3, so that this circuit starts to operate. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
