| 摘要 |
<p>The present invention provides a cipher stream generator including first (L1) and second (L2) linear feedback shift registers, each having a clock input and an output, the cipher stream generator being characterized by: the outputs being combined to generate said cipher stream and the output of said second register (L2) being combined with a clock signal, the combined second register output and clock signal is inputted to the clock input of said first register (L1) and the clock signal being inputted into the clock input of said second register (L2). <IMAGE></p> |
