发明名称 A memory device with a ramp-like voltage biasing structure and reduced number of reference cells
摘要 A memory device (100) is proposed. The memory device includes a plurality of memory cells (Mc), means for comparing a set of selected memory cells (Mc) with at least one reference cell (Mr 0 -Mr 2 ) having a predefined threshold voltage, the means for comparing including biasing means (115) for applying a biasing voltage having a substantially monotone time pattern to the selected memory cells and the at least one reference cell, means (130) for detecting the reaching of a comparison current by a measure cell current corresponding to each selected memory cell and by a measure reference current corresponding to each reference cell, and means (145) for determining a condition of each selected memory cell according to a temporal relation of the reaching of the comparison current by the corresponding measure cell current and by the at least one measure reference current, wherein the means for comparing further includes means (320-350;420-480;520-530;610) for selectively modifying at least one of said currents to emulate the comparison with at least one further reference cell having a further threshold voltage.
申请公布号 EP1699054(A1) 申请公布日期 2006.09.06
申请号 EP20050101659 申请日期 2005.03.03
申请人 STMICROELECTRONICS S.R.L. 发明人 VIMERCATI, DANIELE;BOLANDRINA, EFREM
分类号 G11C11/56;G11C16/28 主分类号 G11C11/56
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