METHOD FOR FORMING OVERLAY VERNIER IN SEMICONDUCTOR DEVICE,申请号KR20000068981-传众专利搜索

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发明名称	METHOD FOR FORMING OVERLAY VERNIER IN SEMICONDUCTOR DEVICE
摘要
申请公布号	KR100618689(B1)	申请公布日期	2006.09.06
申请号	KR20000068981	申请日期	2000.11.20
申请人		发明人
分类号	H01L21/027	主分类号	H01L21/027
代理机构		代理人
主权项
地址

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