发明名称 Semiconductor booster circuit having cascaded MOS transistors
摘要 The semiconductor booster circuit includes a plurality of stages, each of which has a MOS transistor and two capacitors. The MOS transistor, having a drain, a source and a gate, is formed in a well of a substrate portion. One capacitor has a terminal connected to the drain of the MOS transistor, while the other capacitor has a terminal connected to the gate of the MOS transistor. A first clock signal generating means generate a first clock signal via another terminal of one capacitor. A second clock signal generating mean s generate a second clock signal, with a larger amplitude than a power supply voltage, via another terminal of another capacitor. The plurality of stages are cascaded together, and in each of the stages the source of the MOS transistor is electrically connected to the well in which the transistor is formed, while the wells are electrically insulated from each other.
申请公布号 US7102422(B1) 申请公布日期 2006.09.05
申请号 US19950423089 申请日期 1995.04.18
申请人 NIPPON STEEL CORPORATION 发明人 SAWADA KIKUZO;SUGAWARA YOSHIKAZU
分类号 G05F3/02;H02M3/07 主分类号 G05F3/02
代理机构 代理人
主权项
地址