发明名称 Reduction of fusible links and associated circuitry on memory dies
摘要 The number of fusible links and other circuit components required to provide memory cell redundancy are reduced by sharing physical memory locations among address banks that store memory addresses. Non-trial and error algorithms and techniques determine the number of addresses and the number of identical least significant bit (LSB) values that can share the same physical memory location. By sharing physical locations for identical LSB values, circuit hardware on a memory device (including fusible links and compare circuitry) is reduced. Thus, less die area is needed to provide the same degree of redundancy.
申请公布号 US7102956(B2) 申请公布日期 2006.09.05
申请号 US20060343526 申请日期 2006.01.30
申请人 MICRON TECHNOLOGY, INC. 发明人 AYYAPUREDDI SUJEET V;SEERAM VASU
分类号 G11C8/00;G06F11/00;G06F12/02;G11C7/00;G11C7/10;G11C17/18 主分类号 G11C8/00
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