发明名称 Measuring the 3 dB frequency bandwidth of a phase-locked loop
摘要 The 3 dB frequency bandwidth of a phase-locked loop (PLL) is determined by measuring the frequency of a voltage controlled oscillator (VCO) signal when an up charging current is applied, measuring the frequency of the VCO signal when a down charging current is applied, and then using the two frequency measurements to calculate the 3 dB frequency bandwidth of the PLL. The up and down charging currents can be applied through a charge current switch system and the frequency measurements can be made with a frequency counter, both of which are monolithically integrated with the PLL. The technique for measuring the 3 dB frequency bandwidth can be applied to a first order or a second PLL. When applied to a second order PLL, the technique includes an initial frequency centering operation.
申请公布号 US7102401(B2) 申请公布日期 2006.09.05
申请号 US20040999359 申请日期 2004.11.30
申请人 AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD. 发明人 GALLOWAY BRIAN JEFFREY
分类号 H03L7/00;H03L7/06 主分类号 H03L7/00
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