| 摘要 |
A semiconductor memory device, including: a plurality of banks each of which includes a plurality of memory cells, a plurality of redundancy memory cells for replacing a defective memory cell and a repair circuit, having a plurality of fuse sets, for substituting an address to thereby access the redundancy memory cell instead of the defective memory cell; and a common repair circuit, having a plurality of fuse sets, for substituting the address in order to replace the defective memory cell with the redundancy memory cell included in any of the plurality of banks.
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