发明名称 |
TFT array substrate and liquid crystal display device using it |
摘要 |
The widths of those portions of a semiconductor layer 5 and a drain line 6 a overlapping with it which cross an edge line of a gate electrode 2 are made smaller than the channel width of a thin-film transistor. With this measure, the overlap area of the gate electrode 2 and a drain electrode 6 is reduced. As a result, a variation of the above overlap area due to alignment errors in a photolithography apparatus used in patterning the gate lines 2, the drain electrodes 6, and source electrodes 7 can be reduced and the frequency of occurrence of display defects can be decreased.
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申请公布号 |
US7098969(B2) |
申请公布日期 |
2006.08.29 |
申请号 |
US20040988626 |
申请日期 |
2004.11.16 |
申请人 |
KABUSHIKI KAISHA ADVANCED DISPLAY |
发明人 |
HASHIGUCHI TAKAFUMI;YAMAGUCHI TAKEHISA;NAKAGAWA NAOKI |
分类号 |
G02F1/136;G02F1/1343;G02F1/1368;G09F9/30;H01L27/12;H01L29/423;H01L29/786 |
主分类号 |
G02F1/136 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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