发明名称 Zone tree method and mechanism
摘要 A method of analyzing a design of an electronic circuit uses slices. The method includes generating one or more slices, each slice comprising a contiguous region of the design, and generating an set comprising one or more bins for each slice. A search for an object may be performed by determining a search area, and identifying slices containing at least a portion of the search area. For each identified slice, each object within the search area is associated with one of the bins of the set for the slice.
申请公布号 US7100128(B1) 申请公布日期 2006.08.29
申请号 US20030342823 申请日期 2003.01.14
申请人 CADENCE DESIGN SYSTEMS, INC. 发明人 NEQUIST ERIC;SALOWE JEFFREY SCOTT;PUCCI STEVEN LEE
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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