发明名称 Patch substrate for external connection
摘要 Embodiments include a generally planar patch substrate having external connection pads on one side, electrical connections connected to the external connection pads and extending through the substrate, and plated contacts formed on the electrical connections and extending beyond the other side of the patch substrate. The external connection pads may be connected to one electrical device using solder bumps or balls, and the plated contacts may be connected to contacts of another electrical device by thermo-compression bonding. Also, a surface of the patch substrate having the plated contacts may be attached to the other electrical device using an electrically insulating adhesive. Moreover, the plated contacts may have a smaller surface area than the external connection pads, so that the other electrical device can also have smaller contacts, leaving more space for electrically conductive traces to the contacts on the surface and within layers of the other electrical device.
申请公布号 US7097462(B2) 申请公布日期 2006.08.29
申请号 US20040881243 申请日期 2004.06.29
申请人 INTEL CORPORATION 发明人 ICHIKAWA KINYA
分类号 H01R12/00;H05K1/14;H05K3/30;H05K3/34 主分类号 H01R12/00
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