发明名称 Alignment marks with salicided spacers between bitlines for alignment signal improvement
摘要 The present invention pertains to utilizing a salicide in establishing alignment marks in semiconductor fabrication. A metal layer is formed over exposed portions of a silicon substrate as well as oxide areas formed over bitlines buried within the substrate. The metal layer is treated to react with the exposed portions of the silicon substrate to form salicided areas. The metal layer does not, however, react with the oxide areas. As such, salicided areas are formed adjacent to the oxide areas to provide an enhanced optical contrast when light is shined there-upon. In this manner, the alignment marks can be more readily "seen". The enhanced optical contrast thus allows the marks to continue to be seen as scaling occurs.
申请公布号 US7098546(B1) 申请公布日期 2006.08.29
申请号 US20040869286 申请日期 2004.06.16
申请人 FASL LLC 发明人 LINGUNIS EMMANUIL H.;YANG JEAN YEE-MEI;SHIRAIWA HIDEHIKO
分类号 H01L23/544;H01L21/76 主分类号 H01L23/544
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