ACCELERATED LIFE TEST OF MRAM CELLES

摘要

A circuit (30) provides a stress voltage to magnetic tunnel junctions (MTJs) (34-48), which comprise the storage elements of a magnetoresitive random access memory (MRAM) (10), during an accelerated life test of the MRAM (10). The stress voltage is selected to provide a predetermined acceleration of aging compared to normal operation. A source follower circuit (70) is used to apply a stress voltage to a subset of the memory cells at given point in time during the life test. The stress voltage is maintained at the desired voltage by a circuit (24) that mocks the loading characteristics of the portion of the memory array (12) being stressed. The result is a closely defined voltage applied to the MTJs (34-48) so that the magnitude of the accelaration is well defined for all of the memory cells (34-48).