| 摘要 |
The variable frequency oscillator is capable of operation at a low power supply voltage and oscillating at a high frequency. A phase locked loop and a clock synchronizer use the variable frequency oscillator and have a wide oscillation frequency range. The variable frequency oscillator has plural delay cells which are cascaded and the output of the final stage delay cell is fed back to the input of the first stage delay cell. Each of the delay cells includes a differential amplifier and a positive feedback circuit, connected with input and output terminals intersecting with each other. The feedback circuit has complementary amplifiers each having an input terminal formed by connecting together gates of a pMOS and an nMOS transistor and an output terminal formed by connecting together the drains thereof. The positive feedback circuit, provided between output terminals of the differential amplifier, a controlling MOS transistor for inputting a frequency control signal for controlling the source current of the complementary amplifier to the gate thereof and the complementary amplifiers are connected in series between a power supply terminal and a ground terminal. |
