发明名称 WAFER-LEVEL MOAT STRUCTURE
摘要 <p>A wafer-level CSP (200) includes at least one die (202) from a wafer. The wafer-level CSP has a plurality of solder ball pads (206), a solder ball (308) at each solder ball pad and a polymer collar (310) around each solder ball. A moat (204) is formed in the surface of a polymer layer (412) disposed on the wafer during manufacturing of the wafer-level CSP. A temporarily liquified residual (502) from the polymer collar, which occurs while the wafer is heated to the reflow temperature of the solder ball, flows from the polymer collar. The moat acts as a barrier to material flow, limiting the distance that the residual spreads while liquified. The residual from the polymer collar remains within a region (314) defined by the moat. A full-depth moat (312) extends completely through the polymer layer. Alternatively, a partial-depth moat (712 and 912) extends partially through the polymer layer. The abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims pursuant to 37 C.F.R. §1.72(b).</p>
申请公布号 KR20060093725(A) 申请公布日期 2006.08.25
申请号 KR20067008010 申请日期 2006.04.25
申请人 FLIPCHIP INTERNATIONAL, L.L.C 发明人 JOHNSON MICHAEL E.;ELENIUS PETER;KIM, DEOK HOON
分类号 H01L23/28;H01L;H01L21/44;H01L21/60;H01L21/66;H01L23/31;H01L23/48;H01L23/485 主分类号 H01L23/28
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