| 摘要 |
A buffer memory temporarily stores data sequentially outputted to a data using apparatus. A memory is accessed by at least one memory access circuit via a bus. A data transfer circuit performs a data transfer from the memory to the buffer memory via the bus. The data transfer circuit performs the data transfer from the memory to the buffer memory under a state where the bus is occupied by the data transfer circuit from when an amount of data in the buffer memory is less than a first predetermined amount to when the amount of data in the buffer memory exceeds a second predetermined amount larger than the first predetermined amount.
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