| 摘要 |
The arrangement has three semiconductor chips, which are connected with each other in a common housing, where the arrangement is arranged for transmission of signals between a logic chip (I) and a memory chip (II), which are semiconductor chips, over a transmitting/receiving port. The port is arranged at the chip-sided ends of power supply lines (V1, V2), which connect the chips (I, II). An independent claim is also included for a method of transmitting data signals between a logic chip and a memory chip. |
