发明名称 Nonvolatile semiconductor memory devices and the fabrication process of them
摘要 The present invention enables to avoid a reduction in coupling ratio in a nonvolatile semiconductor memory device. The reduction is coupling ratio is caused due to difficulties in batch forming of a control gate material, an interpoly dielectric film material, and a floating gate material, the difficulties accompanying a reduction in word line width. Further, the invention enables to avoid damage caused in the batch forming on a gate oxide film. Before forming floating gates of memory cells of a nonvolatile memory, a space enclosed by insulating layers is formed for each of the floating gates of the memory cells, so that the floating gate is buried in the space. This structure is realized by processing the floating gates in a self alignment manner after depositing the floating gate material. Therefore, it is unnecessary to perform the batch forming of the control gate material, the interpoly dielectric film material, and the floating gate material in the case of processing the control gates, thereby ensuring adequate interpoly dielectric film capacitance.
申请公布号 US2006186463(A1) 申请公布日期 2006.08.24
申请号 US20060350118 申请日期 2006.02.09
申请人 SASAGO YOSHITAKA;KOBAYASHI TAKASHI 发明人 SASAGO YOSHITAKA;KOBAYASHI TAKASHI
分类号 H01L29/788;G11C16/04;H01L21/8247;H01L27/115;H01L29/792 主分类号 H01L29/788
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