发明名称 RECEIVER
摘要 PROBLEM TO BE SOLVED: To realized a receiver capable of minimizing the delay quantity of synchronism correction that accompanies bit de-interleaving processing. SOLUTION: The receiver is a receiver for a satellite broadcast for transmitting content information by using a plurality of broadcasting channels that differ in bit interleaving time, and has a bit-deinterleaving circuit 11 which performs bit deinterleaving processing for the broadcasting channels; a delay time correction table 12, where a correction delay time for minimizing the delay quantity of synchronism correction accompanying the bit de-interleaving processing is previously set to correct time differences between the broadcasting channels caused in the bit deinterleaving processing for the respective broadcasting channels; and a delay time correcting circuit 13 which establishes the synchronism of TS packet heads for a plurality of received broadcasting channels, on the basis of corrected delay times from the delay time correction table 12, corresponding to the plurality of received broadcasting channels. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2006222623(A) 申请公布日期 2006.08.24
申请号 JP20050032982 申请日期 2005.02.09
申请人 TOSHIBA CORP 发明人 ABE MASAHIRO
分类号 H03M13/27;H03M13/29;H04L1/00 主分类号 H03M13/27
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