| 摘要 |
Power consumption in an integrated circuit memory is reduced by lowering the power supply demand from an on-chip pumped VCCP power source. Only the row decoders for subarrays in a memory bank that were previously activated are precharged in response to a bank precharge command. Additional circuitry is provided to the precharge clock generator circuit. The additional circuitry includes a latch that is set when an array select signal is asserted, and reset when a precharge operation for that bank occurs.
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