发明名称 Architecture of reconfigurable radio processor
摘要 A reconfigurable radio processor comprises a task interface and an execution kernel. The processor can be applied to a platform comprising a main processor and on-chip bus, and uses a task-based interface between the main processor and the radio processor. The radio processor simplifies the designs for control system, instruction set and data path. The bus interface includes a task dispatcher. The execution kernel comprises a global control unit, at least one function unit, an operation network, and a data network. The radio processor meets the reconfigurable and scalable requirements. It allows system designers to realize many applications on an IC chip, as well as increases the add-on values for the product. It provides system designers with the possibility of replacing another main processor under a special consideration.
申请公布号 US7096288(B2) 申请公布日期 2006.08.22
申请号 US20040850760 申请日期 2004.05.21
申请人 INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE 发明人 LIAO I-TAO;LEE TSE-HAO;KANG CHUNG-CHIEH;SHIH CHIA-HUNG;LIU CHIH-WEI
分类号 H04B1/38;G06F12/00;G06F13/00;G06F13/38;H04B1/40 主分类号 H04B1/38
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