摘要 |
The capacitor ( 10 ) in accordance with the present invention comprises a lower electrode ( 14 A), a dielectric layer ( 16 ) including an SiO<SUB>2 </SUB>layer ( 20 ) formed on the lower electrode ( 14 A) and an Si<SUB>3</SUB>N<SUB>4 </SUB>layer ( 22 ) formed on the SiO<SUB>2 </SUB>layer ( 20 ), and an upper electrode ( 14 B) formed on the dielectric layer ( 16 ). When the SiO<SUB>2 </SUB>layer ( 20 ) is thus interposed between the lower electrode ( 14 A) and Si<SUB>3</SUB>N<SUB>4 </SUB>layer ( 22 ), the lower electrode ( 14 A) and Si<SUB>3</SUB>N<SUB>4 </SUB>layer ( 22 ) adhere to each other more firmly than in the case where the Si<SUB>3</SUB>N<SUB>4 </SUB>layer ( 22 ) is directly formed on the lower electrode ( 14 A) as in a conventional capacitor. Namely, since the dielectric layer ( 16 ) includes the Si<SUB>3</SUB>N<SUB>4 </SUB>layer having a higher dielectric constant, the capacitor ( 10 ) in accordance with the present invention yields a large capacitance, while the adhesion between the dielectric layer ( 16 ) and lower electrode ( 14 A) is improved over the conventional capacitor.
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