| 摘要 |
A multilayer printed wiring board 10 includes: a core substrate 20 ; a build-up layer 30 formed on the core substrate 20 and having a conductor pattern 32 on an upper surface; a low elastic modulus layer 40 formed on the build-up layer 30 ; lands 52 that are disposed on an upper surface of the low elastic modulus layer 40 and connected via solder bumps 66 to a semiconductor chip 70 ; and conductor posts 50 that are passing through the low elastic modulus layer 40 and electrically connecting lands 52 with conductor patterns 32 . The conductor posts 50 are formed to have the diameters of an upper portion and a lower portion of 80 mum, the diameter of an intermediate portion of 35 mum, the height of 200 mum, and the aspect ratio Rasp (height/minimum diameter) of 5.7 and the maximum diameter/minimum diameter of 2.3. |
