发明名称 MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To improve the packaging reliability of a multi-pin QFN (Quad Flat Non-leaded package) and reduce its manufacturing cost. <P>SOLUTION: This QFN is formed by performing mold sealing of a die pad section 4 where semiconductor chips 2 are mounted, multiple leads 5 arranged around the die pad section 4, multiple patterns comprising terminals 5d formed in the part of each lead 5, and lead frame LF having multiple connnecting parts formed between adjacent patterns. When performing the mold sealing, the lead frame LF is arranged through a resin sheet 41 on the female mold 40B of a metal mold 40, multiple connecting parts are clamped by an upper mold 40A and the female mold 40B so that the terminals 5d of the lead 5 may cut into the resin sheet 41 with the clamped pressure of the metal mold 40. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2006216979(A) 申请公布日期 2006.08.17
申请号 JP20060096525 申请日期 2006.03.31
申请人 RENESAS TECHNOLOGY CORP 发明人 ITO FUJIO;SUZUKI HIROMICHI
分类号 H01L21/56;H01L23/28;H01L23/50 主分类号 H01L21/56
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