发明名称 COMPUTER SYSTEM AND TIMER CONTROL METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To achieve a plurality of items of timer processing by using one hardware timer. <P>SOLUTION: An interrupt setting part 5 equipped with a timer table 21 and an interrupt table 22 capable of storing a counter value and an interrupt value for each kind of software timers, stores a minimum value out of interrupt values stored in the interrupt table 22 in an interval timer match register 12. When an interval timer interrupt occurs, a priority acclimation determining part 15 notifies the fact to an interrupt processing part 6 together with a vector number. Accordingly, the processing part 6 becomes possible to specify the kind of the timer in which the timer interrupt has occurred depending on the vector number, and to achieve the plurality of the items of the timer processing by using only one hardware timer that is an interval time counter 11. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2006215623(A) 申请公布日期 2006.08.17
申请号 JP20050025028 申请日期 2005.02.01
申请人 NEC COMPUTERTECHNO LTD 发明人 TAKATO MASAHIKO
分类号 G06F9/48;G06F1/14 主分类号 G06F9/48
代理机构 代理人
主权项
地址
您可能感兴趣的专利