发明名称 |
SHALLOW JUNCTION SEMICONDUCTOR |
摘要 |
An integrated circuit with a semiconductor substrate is provided. A gate dielectric is on the semiconductor substrate, and a gate is on the gate dielectric. A suicide layer is on the semiconductor substrate adjacent the gate and the gate dielectric. The silicide layer incorporates a substantially uniformly distributed and concentrated dopant therein. A shallow source/drain junction is beneath the salicide layer. An interlayer dielectric is above the semiconductor substrate, and contacts are in the interlayer dielectric to the salicide layer.
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申请公布号 |
US2006180873(A1) |
申请公布日期 |
2006.08.17 |
申请号 |
US20060307537 |
申请日期 |
2006.02.11 |
申请人 |
PELELLA MARIO M;EN WILLIAM G;PATON ERIC;MASZARA WITOLD P |
发明人 |
PELELLA MARIO M.;EN WILLIAM G.;PATON ERIC;MASZARA WITOLD P. |
分类号 |
H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 |
主分类号 |
H01L29/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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