发明名称
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of rightly comparing phases at all the time without depending on the frequencies of clock signals by switching a delay step to be selected by a switch circuit, applying ratio information to an auxiliary circuit and performing control for matching the phases of reference clock and internal clock signal. SOLUTION: Corresponding to the ratio information supplied from a control circuit 25, an interpolation circuit 24 generates the internal clock signal of a phase having a transition edge between the transition edge of the first clock signal and the transition edge of the second clock signal. A phase comparator circuit 26 compares the phases of the reference clock signal and the internal clock signal. On the basis of the compared result of the phase comparator circuit 26, a control circuit 25 precisely controls the phase of the internal clock signal by applying the ratio information to the interpolation circuit 24 so as to match the phases of the internal clock signal and the reference clock signal. Control due to the control circuit 25 is continued until the phases are matched.
申请公布号 JP3808670(B2) 申请公布日期 2006.08.16
申请号 JP19990232720 申请日期 1999.08.19
申请人 发明人
分类号 G06F1/10;G11C11/407;G06F1/12;H03K5/135;H03K19/0175;H03L7/081 主分类号 G06F1/10
代理机构 代理人
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