发明名称 Limiting circuit with level limited feedback
摘要 A limiting circuit includes an input transconductance stage, an output transconductance stage, a feedback transconductance stage, first and second resistive loads, and a level limiting circuit. The input transconductance stage is operably coupled to convert an input voltage signal into an input current signal. The first resistive load is operably coupled to convert the input current signal and a feedback current signal into an intermediate output voltage signal. The output transconductance stage is operably coupled to convert the intermediate output voltage signal into an output current signal. The second resistive load is operably coupled to convert the output current signal into an output voltage signal. The feedback transconductance stage is operably coupled to produce the feedback current signal based on the output voltage signal. The level limiting module is operably coupled to limit at least one voltage level of the feedback transconductance stage.
申请公布号 US7091773(B1) 申请公布日期 2006.08.15
申请号 US20040900945 申请日期 2004.07.28
申请人 XILINX, INC. 发明人 BRUNN BRIAN T.;NIX MICHAEL A.
分类号 H03F1/36 主分类号 H03F1/36
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