发明名称 Code sequence for vector gather and scatter
摘要 Gather and scatter operations are used when elements of a vector which may be operated on in parallel are not located at successive addresses in memory. Prior data processing systems required complex address calculation hardware and other hardware to perform vector gather and scatter operations. By contrast, one embodiment of the present invention implements gather and scatter operations using a plurality of deposit and extract instructions. As a result, gather and scatter operations may be efficiently performed within a general purpose processing environment and without the need for dedicated gather/scatter hardware.
申请公布号 US7093102(B1) 申请公布日期 2006.08.15
申请号 US20000538012 申请日期 2000.03.29
申请人 INTEL CORPORATION 发明人 DULONG CAROLE
分类号 G06F12/06 主分类号 G06F12/06
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