发明名称 Signal validation and arbitration system and method
摘要 A common design framework for input and output signal validation, arbitration, and fault reporting for real-time controllers includes a method of validating redundant input and output signals and arbitrating between the redundant input and output signals by determining a fault severity level for each of the redundant input and output signals, and determining a signal to transmit for further processing based at least in part on the determined fault severity levels.
申请公布号 US7093168(B2) 申请公布日期 2006.08.15
申请号 US20020237834 申请日期 2002.09.09
申请人 HONEYWELL INTERNATIONAL, INC. 发明人 MAHONEY TIMOTHY D.
分类号 G06F11/00;H04L1/06;H04L1/22;H04L1/24 主分类号 G06F11/00
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