发明名称 Calibration of analog to digital converter by means of multiplexed stages
摘要 An improved pipelined analog to digital converter that facilitates calibration for non-linearity errors and a method for obtaining calibration values. The analog to digital converter has a calibration mode in which the output bits for stages in the pipeline can be coupled to output pins of the device. Device pins that are used in normal operating mode to output the most significant bits of the ADC output are used in calibration mode to make available output bits of a pipeline stage being calibrated. A calibration method takes advantage of the outputs of the stages being directly observable to compute calibration values. The output bits of a pipeline stage are monitored as the analog input to the ADC is increased. A change in these bits identifies a subrange boundary. Errors are measured for values immediately above and immediately below each subrange boundary and used to compute correction factors.
申请公布号 US7091891(B2) 申请公布日期 2006.08.15
申请号 US20040833774 申请日期 2004.04.28
申请人 ANALOG DEVICES, INC. 发明人 BARDSLEY SCOTT G.;RIGSBEE BAETON C.
分类号 H03M1/10;G01R35/00;G06F19/00;H03M1/16;H03M1/38 主分类号 H03M1/10
代理机构 代理人
主权项
地址