发明名称 |
Multi-gate e.g. double gate, field effect transistor, has channel with multilayer structure that has conditioning layers arranged to have electric properties capable of constraining adjacent conducting layer to confine charge carriers |
摘要 |
The transistor has a drain (40) and a source (50) that are situated at the respective ends of a channel (10). The channel is separated from the grids by dielectric layers. The channel has a multilayer structure including conditioning layers and charge carriers conducting layers. Each conditioning layer is arranged to have electric properties capable of constraining an adjacent conducting layer to confine the charge carriers.
|
申请公布号 |
FR2881878(A1) |
申请公布日期 |
2006.08.11 |
申请号 |
FR20050001130 |
申请日期 |
2005.02.04 |
申请人 |
S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES SOCIETE ANONYME |
发明人 |
ALLIBERT FREDERIC;GHYSELEN BRUNO;AKATSU TAKESHI |
分类号 |
H01L29/786 |
主分类号 |
H01L29/786 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|