GATE STACKS

摘要

A structure and fabrication method for a gate stack used to define source/drain regions in a semiconductor substrate (110). The method comprises (a) forming a gate dielectric layer (120) on top of the substrate (110), (b) forming a gate polysilicon layer (130) on top of the gate dielectric layer (120), (c) implanting n-type dopants in a top layer (130a) of the gate polysilicon layer (130), (d) etching away portions of the gate polysilicon layer (130) and the gate dielectric layer (120) so as to form a gate stack (132, 134, 122) on the substrate (110), and (e) thermally oxidizing side walls of the gate stack (132, 134, 122) with the presence of a nitrogen-carrying gas. As a result, a diffusion barrier layer (170) is formed at the same depth in the polysilicon material of the gate stack (132, 134, 122) regardless of the doping concentration. Therefore, the n-type doped region (132) of the gate stack has the same width as that of the undoped region (134) of the gate stack (132, 134, 122.).