| 摘要 |
PROBLEM TO BE SOLVED: To solve the problem that a difference in delay variation distribution is caused, for example, due to the effect of the number of gate stages in the path, the number of fan-out, cell configuration or the like, by depending on the circuit configuration of path in an integrated circuit and information of the path. SOLUTION: An apparatus includes: a first storage means for storing the netlist of the path as targeting a specified path in the path between synchronous circuit cells in the integrated circuit having a plurality of synchronous circuit cells; a first input means for adding variation information with respect to a gate length or gate width of a transistor or the like to the netlist; a second storage means for storing a variation netlist obtained as a result of adding the variation information to the netlist; a performing means for performing simulation using the variation netlist and for calculating the delay variation distribution; a second input means for providing the circuit information of the path; and an output means for setting and outputting the design margin of the circuit on the basis of the delay variation distribution and circuit information. COPYRIGHT: (C)2006,JPO&NCIPI
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