| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a PLL circuit equipped with means for correcting Isrc-Isnk error including up to an input waveform or the like of an UP/DN signal input into a charge pump circuit and capable of realizing high accuracy, and also to provide its program. <P>SOLUTION: An output signal UPB/UP of a phase frequency detection circuit (1.1 PFD) is input into a replica charge pump circuit(1.4 CPR) as a normally locked state signal. There are compared in a corrected voltage generation circuit (1.5 CMP) an integrated reference voltage signal (1.4-1 VpmpR), and a PLL circuit control voltage signal (1.3-1 Vpmp) obtained by inputting an output signal UPB/DN of the phase frequency detection circuit into a charge pump circuit (1.3 CP) for its integration in order to control a voltage controlled oscillation circuit (1.7 VCO) with a desired voltage. A charge pump bias circuit (1.2 CPBias) for controlling bias currents of the charge pump circuit and the replica charge pump circuit is controlled with a corrected voltage signal (1.5-1 Vcmp) of a comparison result. <P>COPYRIGHT: (C)2006,JPO&NCIPI |
