| 摘要 |
<p>An N-- region is formed by diffusion on a P-semiconductor substrate, and a P- region is formed in a surface portion of the N-- region. A P+- region is formed in an outer peripheral portion of the N-- region, to suppress expansion of a depletion layer of the P- semiconductor substrate when a high voltage is applied. A gate oxide film is formed on the semiconductor substrate, and a gate electrode of polycrystalline silicon is formed on the gate oxide film, particularly on a channel region which is formed by the semiconductor substrate and the P+- region, which is as a whole the same as a structure of a lateral N-channel MOSFET. Circuit elements are formed within the N-- region, and a high voltage is applied. Circuit portions are isolated as the gate electrode and a source region are grounded. This reduces the number of steps for manufacturing a high-insulation IC, increases a breakdown voltage, and integrates the circuit denser.
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