发明名称 Protection of the test mode of an integrated circuit
摘要 <p>The integrated circuit has an access controller (2) with outputs for applying a distinct control signal to receiving terminal of respective memory cells (31-38). A test module (5) measures a signal between the output of the controller and terminal for determining whether the measured signal differs from the signal applied on the output by the controller to block formation of shift register (1) if the difference is determined.</p>
申请公布号 EP1688753(A1) 申请公布日期 2006.08.09
申请号 EP20060290205 申请日期 2006.02.06
申请人 STMICROELECTRONICS SA 发明人 BANCEL, FREDERIC;HELY, DAVID
分类号 G01R31/3185 主分类号 G01R31/3185
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