| 摘要 |
In an operation to supply an input signal IN having an amplitude equal to a first power-supply voltage VDD 1 to the gate of a PMOS transistor PM 51 operating at a second power-supply voltage VDD 2 higher than the first power-supply voltage VDD 1 , the levels of signals are converted by using PMOS transistors PM 1 to PM 4 . A signal obtained as a result of the conversion is output from the PMOS transistors PM 1 and PM 2 , being used for controlling electrical conduction of a PMOS transistor PM 51.
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